Zhexu Xi | Materials and Technology in Architecture | Research Excellence Award

Published on by Architecture Engineers

Dr. Zhexu Xi | Materials and Technology in Architecture | Research Excellence Award

Assistant Researcher | University of Oxford | United Kingdom

Dr. Zhexu Xi is an Assistant Researcher at the Inorganic Chemistry Laboratory of the University of Oxford, an invited Visiting Professor at the Hong Kong Institute of Technology, and a Guest Professor with the North American Artificial Intelligence Agency, specializing in inorganic nanoscience, interfacial functional nanomaterials, and AI-assisted materials design. His professional experience spans leading projects on two-dimensional transition-metal clusters for electrocatalysis, magnetic nanoparticle platforms for microfluidic enrichment, and ultrafast carrier dynamics in quantum-dot heterostructures, along with advancing AI-driven prediction frameworks for nanomaterials and contributing to climate-adaptive permeable pavement research. He has published more than thirty peer-reviewed papers across SCI journals and major WoS-indexed conferences, authored patents and book chapters, and delivered interdisciplinary contributions integrating nanoscience, materials chemistry, machine learning, and environmental engineering. Dr. Xi has received distinctions including the Emerging Scientist Award and a Best Paper Award nomination, and he serves as Youth Editorial Board Member of J. Mater. Sci., invited editor for MC Pharm. Sci., annual fellow of J. Water Res., peer reviewer for leading journals such as Nat. Commun. and ACS Appl. Mater. Interfaces, and guest editor for multiple special issues across SCI journals and international conferences, while also contributing to academic leadership through conference chair roles and professional memberships supporting innovation in materials chemistry and AI-driven science. His research impact includes 106 citations, 11 publications, and an h-index of 3.

Profiles: Scopus | ORCID | Google Scholar

Featured Publications

1. Z. Xi, Revisiting the Marcus Inverted Regime: Modulation Strategies for Photogenerated Ultrafast Carrier Transfer from Semiconducting Quantum Dots to Metal Oxides. RSC Adv., 2025, 15, 26897–26918.

2. G. Jin, C. Liu, Z. Xi, H. Sha, Y. Liu, J. Huang, Adaptive dual-view wavenet for urban spatial–temporal event prediction. Inf. Sci., 2022, 588, 315–330.

3. G. Jin, Z. Xi, H. Sha, Y. Feng, J. Huang, Deep multi-view graph-based network for citywide ride-hailing demand prediction. Neurocomputing, 2022, 510, 79–94.

4. R. Kang, H. Li, Z. Xi, S. Ringgard, A. Baatrup, K. Rickers, M. Sun, D.Q.S. Le, et al., Surgical repair of annulus defect with biomimetic multilamellar nano/microfibrous scaffold in a porcine model. J. Tissue Eng. Regen. Med., 2018, 12(1), 164–174.

5. G. Jin, Z. Xi, H. Sha, Y. Feng, J. Huang, Deep multi-view spatiotemporal virtual graph neural network for significant citywide ride-hailing demand prediction. arXiv preprint, 2020, arXiv:2007.15189.

Dr. Xi’s work advances the scientific understanding of nanomaterial interfaces and ultrafast charge dynamics while integrating AI-driven modelling to accelerate material discovery, supporting innovations that strengthen clean energy technologies and sustainable urban systems.

Taehyoun Oh | Digital Architecture | Best Researcher Award

Published on by Architecture Engineers

Prof. Dr. Taehyoun Oh | Digital Architecture | Best Researcher Award

Professor | Kwangwoon University | South Korea

Taehyoun Oh is an Associate Professor at Kwangwoon University specializing in high-speed I/O circuit design and advanced mixed-signal integrated systems. He brings extensive experience from both academia and industry, contributing to high-performance SerDes development, MIMO channel equalization, and signal-integrity innovation through impactful roles in major semiconductor organizations. His research focuses on high-speed chip-to-chip communication, MIMO crosstalk cancellation, low-power equalization architectures, and multichannel I/O design, leading to significant advancements in CMOS-based receiver architectures, adaptive calibration algorithms, and prototype implementations. He has authored influential journal papers, contributed to prominent conferences, and published a specialized book on high-speed I/O circuits, demonstrating consistent leadership in circuit innovation. His work has been recognized through best-paper distinctions, competitive research awards, and collaborative contributions across internationally respected research laboratories and design teams. His technical expertise, scholarly output, and continued commitment to advancing high-speed interface technologies position him as a leading contributor in the field. His research impact includes 115 citations, 26 publications, and an h-index of 5.

Profiles: Scopus | ORCID | Google Scholar

Featured Publications

1. Cho K.U., Gil J., Park C., Cho K.J., Shin J.W., Kim E.S., Eo Y.S., Harjani R., et al. A 3.5–4.7 GHz Fractional-N ADPLL with a low-power time-interleaved GRO-TDC of 6.2 ps resolution in 65 nm CMOS process. IEEE Access, 2024, 2.

2. Chung G., Cho K., Oh T. 2 Lanes × 2.65–6.4 Gb/s scalable IO transceiver with delay compensation technique in 65 nm CMOS process. J. Semicond. Technol. Sci., 2024, 24(3), 184–190.

3. Ahn J., Kim S., Kwon K., Park M., Gil J., Choi H., Kim N.Y., Kim E.S., Jung Y., et al. A 5.3–6.2 GHz Fractional-N frequency synthesizer with variable-gain automatic frequency calibration using cycle slips in 65 nm CMOS. Electronics, 2024, 14(22), 4368.

4. Oh T., Harjani R. A 12 Gb/s multichannel I/O using MIMO crosstalk cancellation and signal reutilization in 65 nm CMOS. IEEE J. Solid-State Circuits, 2013, 48(6), 1383–1397.

5. Oh T., Harjani R. A 6 Gb/s MIMO crosstalk cancellation scheme for high-speed I/Os. IEEE J. Solid-State Circuits, 2011, 46(8), 1843–1856.

Taehyoun Oh’s work advances the future of high-speed electronic systems by enabling faster, more reliable, and energy-efficient chip-to-chip communication essential for next-generation computing and data-driven technologies. His innovations in MIMO equalization, crosstalk cancellation, and high-speed I/O architecture contribute directly to enhancing semiconductor performance and strengthening the global electronics industry. His vision is to pioneer intelligent, scalable interface solutions that shape the backbone of future digital infrastructure.